Msc internship : Spiking neural network (SNN) multilevel synapses in FD-SOI for edge AI at room & cryo temperatures

Project Description

Context: 
AI systems are widely spread in many fields of applications. In particular, deploying AI in quantum systems could open new avenue for advance computing. In this context the purpose of this PhD is to investigate low power SNN, which are known to be the most energy efficient avenue for AI systems, in FD-SOI technologies with phase change memory (PCM) synapse technology at room and cryogenic temperature.


Research project:
The main purpose of this internship is to evaluate SNN architectures based on analog layers (i.e. analog PCM and analog neurons) in P28/18 FD-SOI at room and cryogenic temperature conditions. Particularly, each design block of the SNN should be evaluated (simulation / measurements) at standard and ultra-low temperature with a power consumption optimization to reduce the self-heating during learning and inference phases to address both “off line” and “on line” programming scenarios. This study is based on previous work at room temperature on analog spiking neuron and synapse elements technologies with 28FDSOI process. The PCM multilevel will be investigated more accurately to push the actual limits on the wall PCM and should be extended to dot PCM. Thus, the PhD candidate will realize a deeper investigation of the device/design blocks and technological parameters which impact the final performance and will investigate how to enhance the behavior of device in such thermal conditions.

Supervision & work environment:
Under the supervision Prof. Fabien Alibart- (Labo 3IT/LN2 UdS) and Pr. Lorena Anghel (Labo SpinTec/UGA), the work will be carried out mainly at the Interdisciplinary Institute for Technological Innovation (3IT) of UdS and at SpinTech of UGA, in close collaboration with Dr. Philippe Galy of STMicroelectronics.

Researched profile:
A candidate with an engineering background should have a master’s degree in device physics and electronics simulations design framework, e.g., Spice , CADENCE, Python …. A candidate with a knowledge of electrical characterization with thermal constraints at die level will be an asset for this position.

•Specialization in micro-nanotechnology, electrical engineering, or materials science
•Programming skills (Python, QT, C++)
•Assets: Knowledge of memristors and/or artificial neural networks
•Strong taste for design, experimental cleanroom work and interdisciplinary research and development

Contacts: jobnano@usherbrooke.ca
Documents to provide: CV, all post-secondary transcripts and references.

This project is open to students in the following programs:
- 3rd cycle research internship

Funding offered

Yes

1800 $ per month

Partner(s)

STMicroelectronics

The last update was on 8 October 2024. The University reserves the right to modify its projects without notice.